ASIC Design / DV Engineer

Dallas, TX
Full Time

Leapfrog Semiconductor

Suitable title would be conferred depending on the candidate's experience. Candidates meeting the below requirements may share their resumes by sending it to the email id: Alternate email id:

  • Post-graduates with a background in Electronics, Computer Science, Digital Signal processing, Communication Systems. Candidates skilled in HDLs (Verilog / VHDL / SystemVerilog), and are conversant with the basics of Digital Electronics System Design.
  • Graduate HW engineers at all levels of industry experience in any of the following areas to apply

HW engineering (Design and Verification) at Leapfrog: A sampling of responsibilities:

  • Micro-architecture, RTL implementation, verification of DSP data-path hardware (LDPC Encoder/Decoder, FFT, Filters etc)  for Leapfrog’s SIMD processor core
  • Develop, integrate and verify various SoC components like NoCs, Interrupt Controllers, Debug Systems, SoC Peripherals, High Speed Interconnects like 100G Ethernet, JESD, PCIe, DDR etc
  • Develop testbenches and test automation using appropriate methodology (UVM/C/System Verilog/Python) for IP / Subsystem and Full chip verification
  • Develop FPGA based prototyping platform for system performance and software development
  • Participate in discussions with algorithms engineers and Software engineers to discover optimal solutions to complex system level problems
  • Work on various front-end tool flow including lint, CDC, Coverage analysis, synthesis, STA , Power
  • Work with embedded platforms (hardware emulation systems,reference systems, customer platforms,) to validate the hardware and evaluate system performance in the lab
  • Discover ways to improve way-of-working, by creating internal tools, scripts for automation 
  • Analyze customer requirements to evaluate improvements to the hardware
  • Work on post silicon activities to bring up, validate and characterize the performance of the fabricated silicon in lab 

HW Design engineer at Leapfrog: Experience/Skills checklist

  • Experience domains:
    • Should have been part of multiple tape-outs
    • Experience on multiple frontend tools flow ( spyglass, synthesis, constraint validation, power analysis, LEC,Coverage analysis)
    • For DSP / Datapath IP developers
      • Should have hands-on DSP hardware implementation ( RTL coding, synthesis) experience with good understanding of digital communication concepts,  DSP algorithms, fixed point /floating point arithmetic, DSP data path optimizations
        • Background in FFT/LDPC/ Digital filter design is desirable
        • Background in baseband hardware design for WLAN/LTE/Bluetooth /Cable Modem/5G technologies is desirable
        • Background in RTL implementation of SIMD / Vector processing engines
    • For SoC Developers
      • Should have owned large SOC / Subsystems integration with in depth domain knowledge of one or multiple areas below
        • CPU Subsystem components : Memory controllers, Interconnects IPs , Interrupt controllers etc
        • Integration of complex IPs like PCIE, Ethernet ( MAC and PCS), DDR controller  
        • SOC Power Management

  HW Design Verification engineer at Leapfrog: Experience/Skills checklist

  • Experience domains:
    • For Design Verification engineers
      • proficient in 
        • SV and UVM
        • C
      • Design/Architecture development of testbench-bench environment, test automation, test planning and execution
      • Should have owned verification of IP/Subsystem/SOC level verification like,  
        • Interface / Networking IPs like PCIE, Ethernet ( MAC and PCS), JESD ,
        • Memory Controllers,  DDR Interface, DMAs
        • Systems having NOC Interconnects, multiple CPUs, SoC peripherals, interrupt controller, debug hardware etc
        • DSP Data path

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